Aircraft & Avionics Architecture

An avionics system architecture in which each system function is implemented in a dedicated, self-contained Line Replaceable Unit (LRU) with its own processor, memory, I/O interfaces, and power supply. Each LRU communicates with other LRUs over point-to-point or shared data buses. In a federated architecture, functions are isolated by physical separation: each box performs one or a small number of related functions.

An avionics system architecture in which multiple aircraft functions of potentially different criticality levels are hosted on shared computing hardware (processors, memory, I/O modules, network switches) within a common cabinet or platform. IMA relies on robust partitioning mechanisms to ensure that functions are isolated from each other in time and space, preventing a fault in one hosted application from affecting other applications sharing the same hardware.

A widely used avionics data bus standard that defines a unidirectional, point-to-point serial data bus operating at either low speed (12.5 kbit/s) or high speed (100 kbit/s). Each ARINC 429 bus has a single transmitter and up to 20 receivers. Data is transmitted as 32-bit words using a bipolar, return-to-zero modulation scheme over a twisted shielded pair of wires.

Avionics Full-Duplex Switched Ethernet (AFDX), defined by ARINC 664 Part 7, is a deterministic, full-duplex, switched Ethernet network for avionics data communication. AFDX uses standard Ethernet physical layer and frame format with additional mechanisms for determinism: Virtual Links (VLs) with defined bandwidth allocation, redundant network paths, frame sequencing, and integrity checking. AFDX provides guaranteed bandwidth and bounded latency for each communication flow.

A standard for the Application/Executive (APEX) interface in Integrated Modular Avionics, defining the software interface between hosted applications and the underlying operating system. ARINC 653 specifies robust time and space partitioning: each application executes within a partition that has guaranteed processor time windows and protected memory regions, preventing faults in one partition from propagating to others.

The property of a data communication network that guarantees bounded, predictable message delivery timing under all operating conditions, including worst-case loading. A deterministic data bus ensures that any message transmitted will be received within a known maximum latency, enabling time-critical avionics functions to rely on data freshness and delivery guarantees.

A modular component or assembly of an avionics system designed to be removed and replaced at the aircraft (at the flight line) by maintenance personnel without specialized tools or extensive disassembly, enabling rapid return of the aircraft to service. LRUs are the fundamental unit of line-level maintenance and typically include the complete electronic assembly in its enclosure with connectors, mounting hardware, and a nameplate identifying part number, serial number, and modification status.

A component or sub-assembly within an LRU that is designed to be removed and replaced in a repair shop (not at the aircraft line) using appropriate shop tooling and procedures. SRUs are the fundamental unit of shop-level (bench) maintenance and include items such as circuit board assemblies, power supply modules, display subassemblies, and other modules within the LRU.

Maintenance activities performed on an aircraft at the gate, ramp, or hangar by line maintenance personnel, without requiring the aircraft to be taken out of the operational fleet for an extended period. Line maintenance encompasses pre-flight checks, transit checks, daily checks, troubleshooting, and LRU replacements. It is characterized by the use of standard tools, limited ground time, and the objective of returning the aircraft to service as quickly as possible.

The process of assigning Design Assurance Levels to system components based on the failure condition classifications determined during the system safety assessment, and the use of architectural partitioning to limit the propagation of faults between components of different assurance levels. Partitioning enables a lower-DAL component to coexist with a higher-DAL component on the same hardware or in the same system without requiring the lower-DAL component to be developed at the higher level.

The process of assigning aircraft-level functions to specific systems, and subsequently allocating system functions to hardware items and software components within the system architecture. Functional allocation establishes which physical elements implement each required function and defines the interfaces between them.

The specification of a hardware or software item that results from the functional allocation and system architecture definition process. Item definition establishes the item's functional requirements, performance requirements, interface requirements, environmental requirements, and design assurance level, forming the starting point for the item-level development process under DO-254 (hardware) or DO-178C (software).

An Interface Control Document (ICD) formally defines the physical, electrical, logical, and data characteristics of the interface between two or more systems, subsystems, or components. ICDs specify connector types and pin assignments, signal characteristics (voltage levels, timing, protocols), data formats and message definitions, and the responsibilities of each side of the interface.

The means by which the flight crew interacts with the avionics system, including displays, controls, annunciators, aural alerts, and haptic feedback. The HMI design must enable the crew to effectively monitor system status, receive alerts and warnings, input commands, and maintain situational awareness under normal and abnormal operating conditions.